Digital controllers are now extremely powerful. With the current Field Programmable Gate Array (FPGA), designing a controller is no longer limited to the programming of a microprocessor but includes also the programming of the architecture of the processor itself along with its peripherals and its computing accelerators. As a consequence, the control designer should be now a system architect who also needs a deep understanding of the final system to be controlled. Along this line, this course aims to propose a rational use of current FPGA-based reconfigurable platforms for controlling power electronic and drive applications.
The following topics are covered in the course:
Day 1. - Introduction, presentation of the current trends in terms of digital control implementation for electrical systems.
- Description of FPGA components (Internal architecture of FPGAs, recent System-on-Chip extension, presentation of the corresponding development tools), VHDL reminders.
- Hands-on basic examples, tutorial on a current FPGA development tool chain.
Day 2 and 3: - Main design rules of an FPGA-based controller: Control algorithm refinement (design of a time continuous controller, internal delay issues, digital re-design, sampling issues, quantization issues). Architecture refinement (algorithm / architecture matching, IP-modules reusability, Hardware-In-the-Loop (HIL) validation, system-on-chip extension, High Level Synthesis (HLS) design approach).
- Presentation of practical cases: Current control of a synchronous motor drive, sensorless control techniques (Kalman filtering, high frequency injection), Adaptive MPPT for PV applications, Fault tolerant control of Voltage Source Rectifier.
- Hands-on the FPGA-based control of a power converter connected to the grid. Design of different types of regulators (PI current controller, PR current controller, sliding mode current controller, predictive current controller) and their corresponding Simulink-based and HLS-based IP modules. HiL validation.
Prerequisites: Matlab/Simulink knowledge and C/C++basic knowledge is recommended for the exercises
Organizer: Professor Josep M. Guerrero, Professor Juan C. Vasquez
Lecturers: Professor Eric Monmasson (University of Cergy-Pontoise), Assistant Professor Mattia Ricco (University of Bologna)
Time: April 28 - 30 , 2020
Number of seats: 16
Deadline: April 7, 2020
Important information concerning PhD courses: We have over some time experienced problems with no-show for both project and general courses. It has now reached a point where we are forced to take action. Therefore, the Doctoral School has decided to introduce a no-show fee of DKK 5,000 for each course where the student does not show up. Cancellations are accepted no later than 2 weeks before start of the course. Registered illness is of course an acceptable reason for not showing up on those days. Furthermore, all courses open for registration approximately four months before start. This can hopefully also provide new students a chance to register for courses during the year. We look forward to your registrations.
- Teacher: Josep M. Guerrero
- Teacher: Juan C. Vasquez